Bebhionn

DSP Effect

Send: RBL:

' Delay effect — edit and press Compile (Ctrl+Enter)
' Memory reads/writes are auto-aligned to odd DSP steps.
' (The assembler inserts NOPs if needed.)

#COEF
Send = %100
Fb = %40
Dry = %50
Wet = %75

#ADRS
wa = ms0.0
ra = ms200.0

#PROG
' Read delayed sample from ring buffer
NOP                                    ' step 0 (even) — align
MR MR[ra + DEC]                        ' step 1 (ODD) — memory read works
NOP                                    ' step 2 (even) — pipeline delay
IW MEMS00                              ' step 3 — store read value
' Write input + feedback to delay line
@ MIXS00 * Send + (MEMS00 * Fb +)     ' steps 4-5 — compute
NOP                                    ' step 6 (even) — align
> MW[wa + DEC]                         ' step 7 (ODD) — memory write works
' Output: dry + wet to left and right
@ MIXS00 * Dry + (MEMS00 * Wet +)     ' steps 8-9
> S1 EFREG00                           ' step 10 — left out
@ MIXS00 * Dry + (MEMS00 * Wet +)     ' steps 11-12
> S1 EFREG01                           ' step 13 — right out

=END

Parameters

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DSP Effect

Parameters